The present invention relates to a manufacturing process developing method, and particularly relates to a manufacturing process developing method for a semiconductor and the like.
In development of manufacturing processes for semiconductor products, conventionally, a procedure is dominantly employed in which wafers are processed through a full process, which is a series of manufacturing steps all combined, and then the resultant is verified. However, this procedure requires much time for process development. In detail, it takes about two to three months from the commencement of a full process to the end of verification because of increased number of steps. Further, the verification must be performed plural times, and therefore, a longer time is required for process development as a whole. For example, even for a minor partial change in a manufacturing process, a full process must be run through for evaluation of the change. Thus, process development requires enormous time. For tackling this problem, a method in which a full process is divided into a plurality of modules by step units such as an element isolation step, a wiring step, and a process of each module is developed (see, NIKKEI MICRODEVICES, May, 2003, pp. 91-93, for example). The process development per module unit reduces the time required for verification to about one week per one time though it depends on a module dividing manner. It is noted that each module is composed of a combination of small pieces of steps such as a lithography step, an etching step practically.
However, mere division of a full process into plural modules does not lead to efficient process development with good yield.